1. Field of the Invention
The present invention relates generally to a system-in-package chip, and more particularly to an assembly structure for packaging the system-in-package chip.
2. Description of the Prior Art
As technology continues improving, gate count density keeps increasing and the form factor keeps getting smaller. Integration of all analog, digital and memory chips in a package is essential. SIP (System in Package) is one solution to resolve this complex issue. However, putting many chips in one package is not a trivial task. The assembly house needs to deal with wire bonding issues if the chip was not designed properly, which will cause non-stick bonding pad issues.
Conventionally, a package substrate is used for making electrical connections among integrated circuit silicon dies, wherein wire connections are formed between pads in the integrated circuit silicon dies and contact leads in the package substrate. A non-stick on pad (NSOP) test can then be performed on each of the pads in order to detect non-stick failures. A NSOP test is performed by sending a testing signal from a DC/AC BITS board in a bond integrity test system (BITS) through a BITS Cable to the pads and detecting a current loop from each of the pads to the ground. If there is anything in between to block the current loop, the NSOP test will fail.
As shown in FIG. 1A, a die is placed on a package substrate under which a heat block is disposed, wherein the heat block is connected to ground for performing a wire bonding test by a bond integrity test system (BITS). The BITS will send BITS test signals to the pad through a probe which is in contact with a pad on the die in order to test the continuity of the pad. When a BITS signal carries a DC voltage, the BITS test signal will be conducted through the die and the substrate to the ground; therefore. a separated ground connection is not needed for conducting the pad to the ground because a conductive path is from the pad to the ground through the die and the substrate. That is, there must be a conductive path from the pad to the ground to ensure the continuity of the pad; otherwise the pad will be called a non-stick or floating pad, and the continuity test of the pad will fail.
In another aspect of the conventional technology, a package substrate for connecting the pads of the integrated circuit dies to external leads is always present in order to connect multiple integrated circuit dies, which adds cost.
Therefore, what is needed is an efficient way to connect multiple integrated circuit dies for a system-in-package chip.